Posted: February 21st, 2022

Faculty of Computing, Engineering and Science

Faculty of Computing, Engineering and Science

Assessment Cowl Sheet and Suggestions Kind 2021-22
Module Code:
NG2S901
Module Title:
Configuration and Programming of Embedded Techniques
Module Staff:
Sivagunalan Sivanathan
Assessment Title and Duties:
Digital Alarm Clock
Assessment No.
1
Date Set:
27-Sep-2021 23:55
Submission Date:
18-Feb-22
Return Date:
+4weeks
IT IS YOUR RESPONSIBILITY TO KEEP RECORDS OF ALL WORK SUBMITTED
Marking and Assessment
This project will probably be marked out of 100%
This project contributes to 25% of the full module marks.
Studying Outcomes to be assessed (as specified within the validated module descriptor https://icis.southwales.ac.uk/ ):
1) The scholar will be capable to design embedded methods utilizing the configurable on-chip peripherals within the C programming language, and choose and implement the suitable design approaches to embedded system.
2) The scholar will be capable to perceive the issues related to interfacing to exterior units, and the place acceptable present software program options to beat these points.
Provisional mark solely: topic to alter and / or affirmation by the Assessment Board
Assessment Process:
Marking Scheme Marks Accessible Marks Awarded

Growth of an Embedded system
• Acceptable configuration of SFR 20
• A totally commented and nicely offered code itemizing 10
• Appropriate functioning program 30
• Implementation of flowchart and state diagram 10
• totally Documented Report 20
Report construction
• Class efficiency 10
Whole 100
Grading Standards:
Efficiency Stage Standards
Fail ( 40%) Inadequate documentation and poor report writing with substantial flaws
third Class / PASS
(40% – 49%)
Very primary documentation of experiment, with little background and insignificant conclusion
Decrease 2nd Class / PASS
(50% – 59%) Some components addressed nicely, however total comparatively primary or with vital flaws
Higher 2nd Class / MERIT
(60% – 69%) As 1st class, however with minor flaws in every part
1st Class / DISTINCTION
(70% +)
Superb documentation of experiment, show of ends in graphical kind, in-depth
Project Temporary
Alarm Clock
You’re required to design a digital alarm clock utilizing the Rx63N growth board and the plug in daughter board. The alarm clock’s performance follows the State Transition Diagram in Determine 1. As there aren’t any audible outputs on these boards, use two LEDs that flash alternately to suggest an alarm situation. Use a 3rd LED to offer a visible output as to when the alarm is in a set situation. The alarm clock makes use of three buttons to alter the mode of operation, as indicated in State Transition Diagram.
The alarm clock’s alarm can solely be set or cleared within the ‘Regular Show’ state; that is the one state that the alarm situation could be activated, which might require the alarm to be set and the precise time to match the alarm time. If the alarm has been activated then any of the three buttons will cease the alarm, taking it out of the set situation. If the alarm will not be stopped by consumer interplay, then after one minute the alarm clock will mechanically cease the LEDs toggling, once more taking it out of a set situation.
You additionally want to make sure that there may be timeout services for when the consumer takes the appliance right into a state aside from Regular Show. This could make sure that after a interval of time with no consumer interplay the appliance would revert again to the ‘Regular Show’ state. This characteristic will not be indicated on the State Transition Diagram, Determine 1., however must be included and submitted as half of your report.

Determine 1 State transition diagram of Alarm Clock

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Computing, Engineering, and Science Faculty

2021-22 Assessment Cowl Sheet and Suggestions Kind

Module ID:

NG2S901

Module Identify:

Embedded System Configuration and Programming

Module Group:

Sivagunalan Sivanathan (Sivagunalan Sivanathan)

Title and duties for the Assessment:

Alarm Clock with Digital Show

No. of Assessment

1

Set a date:

23:55, September 27, 2021

Date of Submission:

18-Feb-22

Date of Return:

+4weeks

IT IS YOUR RESPONSIBILITY TO KEEP RECORDS OF ALL WORK SUBMITTED

Marking and Assessment

This project will probably be marked out of 100%

This project contributes to 25% of the full module marks.

Studying Outcomes to be assessed (as specified within the validated module descriptor https://icis.southwales.ac.uk/ ):

1) The scholar will be capable to design embedded methods utilizing the configurable on-chip peripherals within the C programming language, and choose and implement the suitable design approaches to embedded system.

2

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